This invention relates to a semiconductor read only memory, more particularly to a fused programmable read only memory capable of avoiding destruction of the surface thereof. A fused programmable read only memory (PROM) typically uses polycrystalline silicon, aluminium, nichrome, or molybdenum, etc. as a fuse material. Writing of data into the fused PROM is performed by opening or shorting electrical fuses connected to transistors which are positioned at cross points of a memory matrix. Fuses are melted and cut or oxydized and shorted by electric power applied to the fuses.
FIG. 1 illustrates an example of a one bit circuit diagram used in a fused PROM. Base 11 of a bipolar transistor 1 is connected to an X bit line terminal 4 through a base resistance 2 and a fuse 3. Collector 12 of transistor 1 and diodes 5 and 6 forming a main writing current path If are connected to Y bit line terminal 8. Emitter 13 of transistor 1 is connected to a ground terminal 9 through an emitter resistance 7. Fuse 3 is melted and cut by current If to open ground terminal 9 and to apply the plus voltage to Y bit line terminal 8 against X bit line terminal 4. Transistor 1 is not operated in the saturating condition by opening fuse 3, so the output of Y bit line terminal 8 is a "1" level. Other transistors having unopened fuses provide "0" levels.
FIG. 2 illustrates a sectional view of an integrated circuit including the device shown in FIG. 1. Bipolar transistor 1, fuse 3, X line terminal 4, diodes 5 and 6, emitter resistance, Y line terminal 8 and ground terminal 9 are as shown in FIG. 1 except the path between fuse 3 and base 11 through base resistance 2 is deleted for purposes of illustration.
N+ buried regions 21, 22 and 23 are selectively formed in a P silicon substrate 20, and an N epitaxial layer 24 is formed on substrate 20. N epitaxial layer 24 is separated 1y P+ dam regions 25 and island regions 31, 32 and 33 are formed. N+ connection regions 41, 42 and 43 are formed on N+ buried regions 21, 22 and 23. PN+ type diodes 5 and 6 and NPN type transistor 1 are formed in island regions 31, 32, and 33, respectively. Fuse resistor 3 is provided on P+ dam region 25 through an oxide film 26.
Fuse resistor 3 is made of, for example, polycrystalline silicon. This fuse construction is better than the inner diffusion fuse, because writing is easy and the influence of parasitism capacity 10 (shown in FIG. 1) is decreased. The resistive value of fuse resistor 3 is set by the addition of the impurity. Fuse resistor 3 is also arranged on the surface of substrate 20 opposite to P+ dam region 25 connected to ground terminal 9.
FIG. 3 illustrates an electrically equivalent and simplified sectional view of FIG. 2 to explain the current path If produced by the writing voltage. Plus potential Vw is applied to X line terminal 4 against Y line terminal 8. If the forward voltage drop of parasitic diode 10 (shown in FIG. 1) formed by P+ dam region 25 and island region 33 is Vf, the voltage drops of both electrodes of fuse resistor 3 against P+ dam region 25 are (Vw-Vf) and Vf, respectively. Generally, (Vw-Vf) Vf. The temperature increase of fuse resistor 3 when melted and cut by the writing voltage Vw reaches 1200 to 1500 degree C.
As the result, the temperatures of fuse resistor 3 and the neighborhood of electrodes 51 and 52 are very high. There are cases where dielectric breakdown occurs between electrode 51 and P+ dam region 25 under the high temperature and the high electric field, so electrode 51 and P+ dam region 51 are shorted. Often when fuse 3 is destroyed, aluminium wiring is burned and broken, too. The reasons for the above-mentioned destruction are in the melting-diffusion from the temperature of fuse 3 and the inferiority of the dielectric strength of aluminium wiring. The tendency of aluminium wiring to burn is closely related to its dielectric strength. For example, aluminium wiring is not burned and stable data writing is possible when voltage Vw to melt fuse 3 is applied to electrodes 51 and 52 only.
However, aluminium wiring is often burned and broken by the short between electrode 51 and P+ dam region 25 when a high electric field exists between electrode 51 and P+ dam region 25. Data writing inferior ratios reach tc 5 to 20% when the thickness of oxide film 26 is 45.degree. Angstroms, applied voltage Vw is 25 volts and Vf is 0.7 volts. The dielectric strength of the oxide silicate film drops to less than 25 volts under the special circumstance of high temperature although it is near 70 volts/1000 Angstrms at room temperature.
This problem is improved by using thick oxide film 26, but the opening of electrode holes is difficult and aluminium wiring is still cut near the edges of holes of the thick oxide film.